555 timer circuit causes spikes on power supply line - how to decouple?

Question

I'm using a 555 timer circuit similar to this one to blink a couple of LEDs at around 1 to 30 Hz:

The oscillations are causing huge spikes on the 5V supply line. There is an audio circuit running off the same 5V and the op-amps are picking up those spikes, rendering them audible.

I've tried a few things to decouple the 555 circuit:

• insert a 220 Ω resistor between 5V and the supply pin on the 555 to limit the current draw
• add 0.1 µF and 47 µF caps between the supply pin on the 555 and GND
• add a 220 µF cap between 5V and GND

All of those seem to mitigate the spikes somewhat, but they're still clearly audible. What else could I do? Is the 555 just so greedy on current that I'd be better off with a different kind of timer?

Answer 1

Your spikes have at least THREE possible causes

• where you tie the Scope Probe GROUND lead (but you can also HEAR this)

• lots of wiring inductance; you can reduce this, by using TWISTED PAIRS to provide Hot/Return paths

• no local provision for charge directly where needed; this requires a SHUNT capacitor

• no series impedance (inductor or resistor) in the VDD path, to modestly separate the charge demands of module_A from the charge demands of module_B; without this series impedance, a charge transient ANYWHERE will cause glitches EVERYWHERE. Yes, if you use a resistor, you will eat up headroom; if you use an inductor, you may get ringing unless you dampen (by parallel resistor) the LC filter.

• not using "Local Battery" concept, where a large shunt capacitor placed across the 555/LED (100uF? 10uF? 1uF),ANDa moderate SERIES impedance in the VDD from the 555/LED to your global raw VDD (which should have its own 10uF cap) create a Low Pass Filter (actually a PI filter, what with that global 10UF )

• haveVERY SHORTleads on the shunting capacitor (and very short PCB traces);

• do not have a Global VDD plane to each IC; that simply ensures the ringing/glitching/spikes of one IC will become ringing/glitching/spikes on VDD ofALLICs

• you may need to create a private island (a 1" square of copper) VDD region, near your IC/load, and use VERY SHORT leads (surface mount capacitors, to the underlying Ground plane.

Learn, and respect, this: Vbounce = L * dI/dT

which means 10nanoHenry (10mm of wire) with dI/dT == 100mA in 10 nanoSeconds, will cause

• Vbounce = 10nH * 0.1 amp / 10nSec = 0.1 volt bounce,

with strong ability to upset all circuits around

YESyou get to design a filter for your VDD.

YES你可以设计VDD distribution system; if you want microvolt (or nanoVolt -- its possible) clean/quiet systems, that ideal abstracted IC performance requires massive VDD filtering and planning, because the IC's PSRR not only is finite even at DC, but rapidly degrades at high frequencies, to become about Zero dB at 1MHz for every IC;